A friend sent a high-definition dieshot of the Exynos9810.
So I decided to draw it.
After finishing the drawing, I felt like it was a prank.
After completing the drawing, I realized that the units were spaced too far apart.
So I made annotations.
Switch to dark mode if it's not clear.
The reason is that the red area is the on-chip system data bus, which connects all the modules on the chip. The CPU-GPU connection is the thickest.
There are two ways to design the bus. One is to place it on top of the existing modules, such as my 12-layer metal layer.
Layers 1-8 are for internal wiring of the unit module, layers 9-10 are for module interconnection bus, and layers 11-12 are for power lines. It heavily relies on the internal bus logic and drivers of the module.
Alternatively, the bus can extend from the module to the top layer, fanning out on the side. It's not necessarily better to have shorter lines, as higher layers have thicker metal lines with larger spacing, resulting in smaller parasitic resistance and capacitance. On the other hand, lower layers have thinner and smaller lines, causing greater loss.
Author: kurnal
Original image: tech
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